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Semiconductor Test Consortium

Overview: The Semiconductor Test Consortium was formed in late 2002 to create cost-effective testing methods for complex logic devices, such as SoCs. More specifically, it was formed to support and further develop the Open Semiconductor Test Open Architecture, a new framework created to enable open test solutions intended to achieve hardware and software interoperability. The consortium's activities included: publishing the architecture; conducting raining programs and workshops; promoting interoperability by identifying requirements (developers kits, etc.); defining and managing validation procedures; and marketing and promotional efforts. *Inactive

Specifications: Not available

IPR Policy: Not available

Current Status: Inactive

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